1. Field of the Invention
The invention relates to the field of CMOS processes and CMOS fabrication techniques.
2. Prior Art
Complementary, metal-oxide-semiconductor (CMOS) transistors also known as COS/MOS transistors are well known in the art and are frequently used in applications requiring low power. Moreover, CMOS field-effect transistors are characterized by their high switching speeds and their very high noise immunity over a wide range of power supply voltages making them useful in many applications.
Recently it has been discovered that in high density MOS circuits (using n-channel or p-channel devices) ionized particles traveling through the substrate can cause failures. Most typically alpha particles generate free minority carriers which, for example, tend to drift under the gates of active devices disturbing charge patterns. The resulting failures, often referred to as "soft failures," become more troublesome as densities increase. CMOS circuits, however, are substantially immune to these type of failures and for this reason CMOS technology has become more important for high density applications.
In the fabrication of CMOS devices, channel stops (also referred to as "guard bands" or isolation regions) are formed in the substrate surrounding active devices. These regions are typically highly doped "frames" of the same conductivity type as the host region for the active device. They are used to reduce leakage between neighboring devices such as that caused by spurious MOS action. This MOS action often results from potentials on interconnecting lines, and the like.
In one commonly employed process for fabricating CMOS devices, wells (such as p-wells) are first formed. Then with another masking operation, the n-channel devices are fabricated in the p-wells along with the n-channel stops. Following this, an additional masking step is used to define p-channel devices and p-channel stops. The channel stops, of necessity, must be spaced apart from the active devices.
In U.S. Pat. No. 4,013,484 an improved process is described for forming CMOS channel stops. With this process, the channel stops are fabricated in alignment with each other and in alignment with the active devices, without extra masking steps. These stops are contiguous with each other and with a source or drain region of the active devices, permitting high density fabrication.
The presently invented and described CMOS process has the advantage over prior art CMOS processing in that the channel stops are formed as a byproduct of forming field oxide regions. Thus, a substantial amount of processing is saved when compared to prior art processes. Additionally, the described process lends itself to fabricating a static memory cell (bistable circuit) without metal contacts.